Electronic devices are implemented on integrated circuits by means of a semi-conductor material die, for example silicon. The semi-conductor die is mounted on and fixed to a metal support, for example with a solder paste. Pads are implemented on the semi-conductor die and are connected to the external pins (also known as leads) of the integrated circuit by means of electrical connections implemented by wires (known as “wire bonding”), clips or ribbons: in this way the semi-conductor die is connected to the external pins. Finally, the semi-conductor die, the metal support, the wires (or clips or ribbons) and part of the pins are encapsulated into a package for protecting the integrated circuit from the external environment.
A known prior art for integrated circuits for high power applications uses a first die implementing the high power functionalities and a second die implementing the control functionalities, wherein the second die is mounted on the first die, for example with a solder paste. The high power functionalities are, for example, the source or drain terminals of a MOSFET or JFET transistor, or the collector or emitter terminals of a bipolar transistor. The control functionalities are, for example, the gate terminal of a MOSFET or JFET transistor or the base terminal of a bipolar transistor.
In the prior art the high power die is connected to the external pins by means of wires, clips, or ribbons, which carry an high current (for example, the current between source and drain of a MOSFET can have values of about 100 A). Applicant has observed that a drawback of the prior art is that the electrical connection between the high power die and the external pins has a low efficiency from a point of view of the electrical and thermal performance; moreover it requires to use suitable arrangements to allow to carry the high current, such as for example an high number of wires, clips or ribbons, thus increasing the size occupied by the integrated circuit.